End-to-End Embedded Cybersecurity
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Laboryzr
Based on a unique approach called PESC for Protect, Evaluate, Service & Certify, completed by Supply, Deploy and Manage, Secure-IC has developed a complete range of security protection and evaluation solutions and services to support its customers throughout the life cycle of their product, from design to certification, from Chip to Cloud.
Chip evaluation is an important step in design and production
- Pre-testing is requested for some certifications.
- Add value to your system by evaluating it.
Secure-IC offers to evaluate your full design process, from pre-silicon, thanks to a dedicated evaluation and security tool called Laboryzr. Laboryzr allows security evaluation at both at pre-silicon stage and at post-silicon stage.
Laboryzr covers both classes of analysis and more:
- Passive: Side-channel analysis
- Active: Fault injection analysis
- Hardware Trojan Detection
- Reverse Engineering prevention
Laboryzr includes three tools and lab’s equipment:
Analyzr evaluates Side-Channel security and vulnerability to Fault Injection at the post-silicon stage. It performs physical security evaluation, after the chip has been produced, on real physical chips and boards.
The Virtualyzr is a pre-silicon security evaluation platform. Assessing your cryptographic design at an early stage allows you to save a lot of effort, time and money. The Virtualyzr takes your design as input and returns an evaluation report about the real security resistance against physical attacks.
The platform allows the detection, localization and analysis of the security leakage in the design at all levels of conception: RTL, Post Synthesis and Place & Route levels. More importantly, with the Virtualyzr you are evaluating the power of the best ever attacker. Actually, the evaluation is performed in the best conditions based on noise-free models and full access to the design signals.
Catalyzr is a software tool that aims at assessing the security of a software implementation. Catalyzr provides an end-to-end workflow that starts with a design input and ends with the generation of a security report. The design input is a pure software code that can be written in C or in Assembly (ASM).